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august 2009 doc id 16101 rev 1 1/24 1 STM6502, stm6503 stm6504, stm6505 dual push-button smart reset features operating voltage 1.0 v (active-low output valid) to 5.5 v low supply current factory-programmable thresholds to monitor v cc in the range of 1.575 to 4.625 v typ. open-drain, active-low reset output dual smart reset push-button inputs with extended reset set up delay adjustable smart reset setup delay (t src ): by external capacitor or external resistor or three-state logic power-on reset operating temperature: industrial grade ?40 c to +85 c package: tdfn-8l 2 x 2 x 0.75 mm, 0.5 mm pitch rohs compliant applications mp3 players portable navigation devices mobile phones tdfn-8l 2 x 2 mm table 1. device summary part number voltage inputs smart reset inputs t src programming reset or power good outputs package v cc v bat sr or sr0 sr1 sre immediate, independent ext. src pin three- state input tsr rst bld STM6502 (1) ??? ? ? tdfn-8l stm6503 ??? ?? tdfn-8l stm6504 ?? ? ?? tdfn-8l stm6505 ?? ? ? ? ? ? tdfn-8l 1. contact local st sales office for availability. www.st.com
contents STM6502, stm6503, stm6504, stm6505 2/24 doc id 16101 rev 1 contents 1 description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 2 signal names . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 3 pin descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 3.1 power supply (v cc ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 3.2 ground (v ss ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 3.3 smart reset input (sr0 ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 3.4 secondary smart reset input (sr1 ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 3.5 edge-triggered smart reset input (sre) - stm6504 only . . . . . . . . . . . . 11 3.6 adjustable delay of smart reset input (src pin) - STM6502 and stm6505 only . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 3.6.1 optional smart reset push-button setup delay times . . . . . . . . . . . . . . . 12 3.7 programmable smart reset input delay (tsr pin) - stm6503 and stm6504 only . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 3.8 reset output (rst ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 3.9 battery monitor input (v bat ) - stm6505 only . . . . . . . . . . . . . . . . . . . . . . 13 3.10 battery low detect output (bld ) - stm6505 only . . . . . . . . . . . . . . . . . . . 13 4 maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 5 dc and ac parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 6 package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 7 part numbering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 8 revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
STM6502, stm6503, stm6504, stm6505 list of tables doc id 16101 rev 1 3/24 list of tables table 1. device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 table 2. signal names . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 table 3. t src programmed by external capacitor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 table 4. t src programmed by external resistor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 table 5. absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 table 6. operating and measurement conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 table 7. dc and ac characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 table 8. v cc voltage thresholds . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 table 9. tdfn ? 8-lead 2 x 2 x 0.75 mm, 0.5 mm pitch package mechanical data . . . . . . . . . . . . . 19 table 10. carrier tape dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 table 11. package marking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 table 12. ordering information scheme . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 table 13. document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
list of figures STM6502, stm6503, stm6504, stm6505 4/24 doc id 16101 rev 1 list of figures figure 1. logic diagrams . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 figure 2. block diagram - STM6502, stm6503, stm6504 (1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 figure 3. block diagram - stm6505 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 figure 4. single-button smart reset typical hookup . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 figure 5. dual-button smart reset typical hookup . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 figure 6. pin connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 figure 7. STM6502, stm6503 timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 figure 8. stm6504 timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 figure 9. stm6505 timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 figure 10. ac testing input/output waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 figure 11. tdfn ? 8-lead 2 x 2 x 0.75 mm, 0.5 mm pitch package outline . . . . . . . . . . . . . . . . . . . . . 19 figure 12. carrier tape . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 figure 13. package marking, top view . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
STM6502, stm6503, stm6504, stm6505 description doc id 16101 rev 1 5/24 1 description the smart reset devices provide a useful feature that ensures that inadvertent short reset push-button closures do not cause system resets as the extended smart reset delay setup periods are implemented. hence, when valid smart reset input conditions and setup periods are met, the rst output will generate a pulse which a sserts the reset output for fixed timeout period (t rec ). the typical application hookup shows that either the single smart reset input or the dual reset inputs are also connected to the applications interrupt and control both the interrupt pin and the hard reset functions. if the push-button is closed for a short time, the processor is only interrupted. if the system still does no t respond properly, hold ing the push-button(s) and keeping it closed for the extended setup time (t src ) causes a hard reset of the processor. the smart reset fe ature helps significantly in crease system stability and eliminates the need for a dedicated reset button. the stm65xx family of smart reset devices co nsists of low current microprocessor reset circuits targeted for mp3 players, portable navigation, mobile phones and other portable devices. the stm65xx devices feature single or dual smart reset inputs (srx). the delayed smart reset setup time (t src ) options of 0 s, 2 s, 6 s and 10 s (all min.) are adjustable by an external capacitor or resistor on the src pin or selectable by three-state logic, see ta bl e 1 . the delayed setup period ignores short switch closures shorter than t src , thus preventing unwanted resets. the stm65xx devices have active-low open-drain reset (rst ) output with power-on reset function. the reset output is also asserted when the monitored supply voltage v cc drops below the specified threshold. the reset output remains asserted for the reset timeout period (t rec ) after the monitored supply voltage goes above the specified threshold. STM6502 has two combined smart reset inputs (sr0 and sr1 ) with delayed smart reset setup time (t src ) programmed by either an external capacitor or resistor on the src pin (device options). stm6503 is similar to STM6502, has two combined delayed smart reset inputs (sr0 , sr1 ) and three user-selectable delayed smart reset setup time (t src ) options of 2 s, 6 s and 10 s through a three-state tsr input pin: when connected to ground, t src = 2 s; when left open, t src = 6 s; when connected to v cc , t src = 10 s (all the times are minimum). stm6504 has two independent smart reset inputs: sr0 provides the delayed smart reset setup time (t src ) function with three user-selectable t src options through a three-state tsr input pin: when connected to ground, t src = 2 s; when left open, t src = 6 s; when connected to v cc , t src = 10 s (all the times are minimum), sre provides instant reset. sre is edge trigger with a special debounce time (t debounce = 240 ms min.) at the falling edge after a valid reset period. stm6505 has two combined delayed smart reset inputs (sr0 , sr1 ) and provides adjustable reset delay setup time via either an external capacitor or resistor connected to the src pin. the rst output depends also on the v cc threshold. stm6505 also provides independent low battery detect (bld ) output controlled by the secondary external input voltage v bat . the v bat is monitored for low voltage and provides an indication on the battery low detect output pin (bld ). v bat threshold is 1.25 v, fixed, external resistor divider to be used to set the actual battery voltage threshold. v bat threshold hysteresis is 8 mv typ.
description STM6502, stm6503, stm6504, stm6505 6/24 doc id 16101 rev 1 (16 mv max.). v bat is voltage monitoring input only, the device is powered only from the v cc pin; v cc must be 1.575 v for proper operation of the v bat comparator. for the whole stm65xx smart reset family, the reset outputs are also asserted when the monitored supply voltage v cc drops below the specified threshold. the reset output remains asserted for the reset timeout period (t rec ) after the monitored supply voltage goes above the specified threshold. figure 1. logic diagrams am00378 v cc sr0 rst v ss STM6502 sr1 sr0 sr1 src v cc rst v ss stm6503 v cc rst v ss stm6504 sr0 sre v cc bld rst v ss stm6505 sr1 sr0 src v bat tsr tsr
STM6502, stm6503, stm6504, stm6505 description doc id 16101 rev 1 7/24 figure 2. block diagram - STM6502, stm6503, stm6504 (1) 1. stm6504 only: sr0 and sre are working independently: sre is edge trigger, it has a special debounce time (t debounce = 240 ms min.) at the falling edge after a valid reset period. figure 3. block diagram - stm6505 am00352 v cc v rst compare sr0 src (STM6502) tsr (stm6503, stm6504) v cc rst t rec generator logic 65 k / no pull-up sr1 (sre stm6504 only) (1) v cc logic 65 k / no pull-up am00319a v cc v rst compare sr0 src v cc rst t rec generator logic v bat v batth compare 65 k / no pull-up sr1 bld
description STM6502, stm6503, stm6504, stm6505 8/24 doc id 16101 rev 1 figure 4. single-button smart reset typical hookup figure 5. dual-button smart reset typical hookup am00380 v cc sr0 tsr sre rst v ss v cc int / nmi gnd push-button switch mcu reset stm6504 100 k am00381a v cc sr0 sr1 tsr rst v ss v cc int / nmi gnd push-button switch mcu push-button switch reset stm650x 100 k
STM6502, stm6503, stm6504, stm6505 signal names doc id 16101 rev 1 9/24 2 signal names figure 6. pin connections table 2. signal names symbol input/ output description rst output open-drain reset output, active-low. bld output battery low detect output, active-low, open-drain. stm6505 only. sr0 input primary push-button smart reset input. active-low, internal pull-up to v cc (65 k ), optionally without pull-up. sr1 input secondary push-button smart reset input - combines with the primary push- button reset to provide set up delay time before reset. active-low, has internal pull-up to v cc (65 k ), optionally without pull-up. sre input secondary push-button smart reset input - provides instant smart reset. sre is edge trigger with a special debounce time (t debounce = 240 ms min.) at the falling edge after a valid reset period. active-high, no internal pull-up to v cc . stm6504 only. src input smart reset input delay setup control: co nnect to either an external capacitor or resistor to adjust the delay setup time (t src ) tsr input a three-state smart reset input delay setup control. when connected to ground, t src = 2 s; when left open, t src = 6 s; when connected to v cc , t src = 10 s (all times are minimum). tsr is a dc-type input, intended to be either permanently grounded or permanently connected to v cc . stm6503 and stm6504 only. v cc supply voltage supply voltage input. power supply for device and an input for the monitored supply voltage. v bat battery monitoring input battery voltage monitoring input. stm6505 only. v ss supply ground ground nc no connect am00379 src nc nc 1 2 3 stm 6502 4 8 7 6 5 rst v ss v cc sr1 sr0 tsr nc nc 1 2 3 stm 6503 4 8 7 6 5 rst v ss v cc sr0 sr1 tsr nc nc 1 2 3 stm 6504 4 8 7 6 5 rst v ss v cc sre sr0 bld src v bat 1 2 3 stm 6505 4 8 7 6 5 rst v ss v cc sr1 sr0
pin descriptions STM6502, stm6503, stm6504, stm6505 10/24 doc id 16101 rev 1 3 pin descriptions 3.1 power supply (v cc ) this pin is used to provide the power to the device and to monitor the power supply. 3.2 ground (v ss ) this is the power ground for the device and all supplies. 3.3 smart reset input (sr0 ) the primary push-button smart reset input, active-low pin is connected to the push-button switch. 3.4 secondary smar t reset input (sr1 ) the secondary push-button smart reset input, active-low pin is connected to the second push-button switch. keeping both smart reset inputs sr0 and sr1 active for longer than t src will activate the reset output pulse. figure 7. STM6502, stm6503 timing reset will be asserted ?low? right after the src delay time (t src ) has been met and will be back to high after the t rec . am00327 rst sr0 sr1 t src t rec
STM6502, stm6503, stm6504, stm6505 pin descriptions doc id 16101 rev 1 11/24 3.5 edge-triggered smart reset input (sre) - stm6504 only sre is active-high, immediate and independent reset input, includes an edge trigger with debounce delay on falling edge, t debounce = 240 ms min. see timing diagram figure 8 . figure 8. stm6504 timing 3.6 adjustable delay of smart reset input (src pin) - STM6502 and stm6505 only this pin provides for controlling the setup time before the push-button action is validated by reset output. it is connected to an external capacitor (c src ), optionally external resistor (r src ), which is tied to ground for providing the desired value of setup time (t src ). the relation between t src and c src (r src ) is given in section 3.6.1: optional smart reset push-button setup delay times . am00328 t rec sr0 t < t src t src t < t debounce => counter reset independent rst sre no debounce t rec t debounce t rec in this case, actual rst low for > 240 ms
pin descriptions STM6502, stm6503, stm6504, stm6505 12/24 doc id 16101 rev 1 3.6.1 optional smart reset push-button setup delay times t src min. 10 x c src [s, f] note: in case of quickly repeated activations of t src counter, an interval of 10 ms min. is needed between the activations to fully discharge c src , so that the next t src is as specified. t src min. r src / 330.7 [s, k ] note: max value of the external resistor (r src ) is 5.688 m which corresponds to t src = 21.5 s typ. 3.7 programmable smart reset inpu t delay (tsr pin) - stm6503 and stm6504 only used to allow the user to program the setup time before the push-button action is validated by reset output. controlled by different voltage levels on the three-state tsr input pin: when connected to ground, t src = 2 s; when left open, t src = 6 s; when connected to v cc , t src = 10 s (all times are minimum). tsr is a dc-type input, intended to be either permanently grounded or permanently connected to v cc . 3.8 reset output (rst ) active-low open-drain reset output in the smart reset family, no pull-up resistor. table 3. t src programmed by external capacitor calculated c src value [f] setup delay t src [s] closest common c src value [f] min typ max 0 0.00012 (1) 1. a necessary minimum to ensure debounce. 0.00015 (1) 0.00018 (1) 0 0.2 2 2.5 3.0 0.22 0.6 6 7.5 9 0.56 1 10 12.5 15 1 table 4. t src programmed by external resistor calculated r src value [k ] setup delay t src [s] closest common r src value [k ] min typ max 0 0.00012 (1) 1. a necessary minimum to ensure debounce. 0.00015 (1) 0.00018 (1) 0 661 2 2.5 3.0 680 1984 6 7.5 9 2000 3307 10 12.5 15 3300
STM6502, stm6503, stm6504, stm6505 pin descriptions doc id 16101 rev 1 13/24 3.9 battery monitor input (v bat ) - stm6505 only an input for monitoring the battery voltage (v bat ). v bat threshold is 1.25 v, fixed, external resistor divider to be used to set the actual battery voltage threshold. v bat threshold hysteresis is 8 mv typ. (16 mv max.). 3.10 battery low de tect output (bld ) - stm6505 only battery low detect output controlled by the v bat voltage monitoring input, active-low, open- drain, no pull-up. figure 9. stm6505 timing am00329 rst bld sr0 sr1 t src t rec v bat v batth
maximum ratings STM6502, stm6503, stm6504, stm6505 14/24 doc id 16101 rev 1 4 maximum ratings stressing the device above the rating listed in table 5: absolute maximum ratings may cause permanent damage to the device. these are stress ratings only and operation of the device at these or any other conditions above those indicated in the operating sections of this specification is not imp lied. exposure to absolute ma ximum rating conditions for extended periods may affect device reliability. refer also to the stmicroelectronics sure program and other relevant quality documents. table 5. absolute maximum ratings symbol parameter value unit t stg storage temperature (v cc off) ?55 to +150 c t sld (1) 1. reflow at peak temperature of 260 c. the time above 255 c must not exceed 30 seconds. lead solder temperature for 10 seconds 260 c ja thermal resistance (junction to ambient) tdfn8 149.0 c/w v io input or output voltage ?0.3 to v cc +0.3 v v cc supply voltage ?0.3 to 7 v
STM6502, stm6503, stm6504, stm6505 dc and ac parameters doc id 16101 rev 1 15/24 5 dc and ac parameters this section summarizes the operating measurement conditions, and the dc and ac characteristics of the device. the parameters in the dc and ac characteristics tables that follow, are derived from tests performed under the measurement conditions summarized in table 6: operating and measurement conditions . designers should check that the operating conditions in their circuit match the operating conditions when relying on the quoted parameters. figure 10. ac testing input/output waveforms table 6. operating and measurement conditions parameter value unit v cc supply voltage 1.0 to 5.5 v ambient operating temperature (t a ) ?40 to +85 c input rise and fall times 5ns input pulse voltages 0.2 to 0.8 v cc v input and output timing ref. voltages 0.3 to 0.7 v cc v 0.8 v cc 0.2 v cc 0.7 v cc 0.3 v cc am00478 table 7. dc and ac characteristics symbol parameter test conditions (1) min typ max unit v cc supply voltage range reset output valid - active-low 1.0 5.5 v i cc supply current (v cc ) STM6502, v cc = 5.0 v 1.2 2.3 a stm6503, v cc = 5.0 v 4 5.8 a stm6504, v cc = 5.0 v 4 5.8 a stm6505, v cc = 5.0 v 1.9 3.3 a v ol reset output voltage low (reset asserted: rst , bld ) v cc 4.5 v, sinking 3.2 ma 0.3 v v cc 3.3 v, sinking 2.5 ma 0.3 v v cc 1.0 v, sinking 0.1 ma 0.3 v
dc and ac parameters STM6502, stm6503, stm6504, stm6505 16/24 doc id 16101 rev 1 reset thresholds v rst fixed voltage trip point for v cc (refer to ta bl e 8 ) ?40 to +85 c v rst ?2.5% v rst v rst +2.5% v 25 c v rst ?2.0% v rst v rst +2.0% v v hyst hysteresis of v rst l, m 0.5% t, s, r, z, y, w, v 1% v cc to reset delay v cc falling from (v rst + 100 mv) to (v rst - 100 mv) at 10 mv/s 20 s t rec reset timeout delay, factory- programmed option a 140 210 280 ms option b 240 360 480 ms t debounce stm6504 only 240 360 480 ms v bat thresholds v batth fixed v bat monitoring threshold stm6505 only 1.225 1.25 1.275 v v bathyst v batth hysteresis stm6505 only 8 16 mv sr input v il sr0 , sr1 , sre input voltage low 0.3 v cc v v ih sr0 , sr1 , sre input voltage high 0.7 v cc v i li(sr) input leakage current, sr and sre inputs option without internal pull-up resistor ?1 +1 a i li(tsr) input leakage current, tsr input stm6503 and stm6504 only ?10 +10 a r pui internal pull-up resistor, input (optional - refer to ta b l e 1 2 ) at 3.3 v and 25 c 65 k r src refer to ta b l e 4 0 5.688 m c src 1 f / 10 s (refer to ta b l e 3 )0f t src (2) delayed smart reset setup time, stm6503 and stm6504. for STM6502 and stm6505 please refer to ta bl e 3 and ta bl e 4 . tsr = v ss 22.53 s tsr = floating 6 7.5 9 s tsr = v cc 10 12.5 15 s 1. valid for ambient operating temperature: t a = ?40 to +85 c; v cc = 1.0 to 5.5 v (except where noted). 2. input glitch immunity is equal to t src . table 7. dc and ac characteristics (continued) symbol parameter test conditions (1) min typ max unit
STM6502, stm6503, stm6504, stm6505 dc and ac parameters doc id 16101 rev 1 17/24 . table 8. v cc voltage thresholds v cc voltage threshold v rst typ 2.5% (?40 c to +85 c) 2.0% (25 c) unit min max min max l (falling) 4.625 4.509 4.741 4.533 4.718 v m (falling) 4.375 4.266 4.484 4.288 4.463 v t (falling) 3.075 2.998 3.152 3.014 3.137 v s (falling) 2.925 2.852 2.998 2.867 2.984 v r (falling) 2.625 2.559 2.691 2.573 2.678 v z (falling) 2.313 2.255 2.371 2.267 2.359 v y (falling) 2.188 2.133 2.243 2.144 2.232 v w (falling) 1.665 1.623 1.707 1.632 1.698 v v (falling) 1.575 1.536 1.614 1.544 1.607 v
package mechanical data STM6502, stm6503, stm6504, stm6505 18/24 doc id 16101 rev 1 6 package mechanical data in order to meet environmental requirements, st offers these devices in different grades of ecopack ? packages, depending on their level of environmental compliance. ecopack ? specifications, grade definitions and product status are available at: www.st.com . ecopack ? is an st trademark.
STM6502, stm6503, stm6504, stm6505 package mechanical data doc id 16101 rev 1 19/24 figure 11. tdfn ? 8-lead 2 x 2 x 0.75 mm, 0.5 mm pitch package outline table 9. tdfn ? 8-lead 2 x 2 x 0.75 mm, 0.5 mm pitch package mechanical data symbol (mm) (inches) min. nom. max. min. nom. max. a 0.70 0.75 0.80 0.028 0.030 0.031 a1 0.00 0.02 0.05 0.000 0.001 0.002 b 0.15 0.20 0.25 0.006 0.008 0.010 d bsc 2.00 0.079 e bsc 2.00 0.079 e 0.50 0.020 l 0.45 0.55 0.65 0.018 0.022 0.026 e l bottom view 8 5 pin#1 id 1 pin 1 index area 4 b e 0.10 c a a1 plane seat ing top view 2x 2x d pin 1 index area 0.10 c 0.10 c 0.08 c 0.10 c a b b a c 8070540_a side view
package mechanical data STM6502, stm6503, stm6504, stm6505 20/24 doc id 16101 rev 1 figure 12. carrier tape t k 0 p 1 a 0 b 0 p 2 p 0 center lines of cavity w e f d top cover tape user direction of feed am03073v2 table 10. carrier tape dimensions package w d e p 0 p 2 fa 0 b 0 k 0 p 1 tunit bulk qty tdfn8 8.00 +0.30 ?0.10 1.50 +0.10/ ?0.00 1.75 0.10 4.00 0.10 2.00 0.10 3.50 0.05 2.30 0.05 2.30 0.05 1.00 0.05 4.00 0.10 0.250 0.05 mm 3000
STM6502, stm6503, stm6504, stm6505 package mechanical data doc id 16101 rev 1 21/24 table 11. package marking figure 13. package marking, top view part number t src delay control smart reset inputs (1) 1. al = active-low, ah = active-high, pu = with internal pull-up re sistor, od = open-drain. v rst rst output (1) t rec option bld output (1) topmark stm6503veaadg6f tsr al v al, od a - 3vg stm6504seabdg6f tsr al s al, od b - 4sg stm6505sdabdg6f r src al, pu s al, od b al, od 5si stm6505rdabdg6f r src al, pu r al, od b al, od 5ri stm6505wdabdg6f r src al, pu w al, od b al, od 5wi am00479 a bc d e topmark a = dot (pin 1 reference) b = assembly plant (p) c = assembly year (y, 0-9): 9 = 2009 etc. d = assembly work week (ww, 01 to 52): 20 = ww20 etc. e = marking area (topmark)
part numbering STM6502, stm6503, stm6504, stm6505 22/24 doc id 16101 rev 1 7 part numbering for other options, voltage threshold values etc. or for more information on any aspect of this device, please contact the st sales office nearest you. table 12. ordering information scheme example: stm6505 w d a b dg 6 f device type STM6502 (1) stm6503 stm6504 stm6505 reset (v cc monitoring) threshold voltage (v rst ) l = 4.625 v (typ., falling) s = 2.925 v r = 2.625 v z = 2.313 v w = 1.665 v v = 1.575 v smart reset setup delay (t src ); presence of internal input pull-up on all smart reset inputs (srx , sre) b = 0 to 15 s, user-programmed (external resistor); no input pull-up d = 0 to 15 s, user-programmed (external resistor); 65 k input pull-up e = 2 or 6 or 10 s min., user-progr ammed (three-state); no input pull-up f = 2 or 6 or 10 s min., user-programmed (three-state); 65 k input pull-up output type a = open-drain, no pull-up, active-low reset timeout period (t rec ) a = 140 ms min. b = 240 ms min. package dg = tdfn8 2 x 2 x 0.75 mm, 0.5 mm pitch temperature range 6 = ?40 c to +85 c shipping method f = ecopack ? package, tape and reel 1. contact local st sales office for availability.
STM6502, stm6503, stm6504, stm6505 revision history doc id 16101 rev 1 23/24 8 revision history table 13. document revision history date revision changes 31-aug-2009 1 initial release.
STM6502, stm6503, stm6504, stm6505 24/24 doc id 16101 rev 1 please read carefully: information in this document is provided solely in connection with st products. stmicroelectronics nv and its subsidiaries (?st ?) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described he rein at any time, without notice. all st products are sold pursuant to st?s terms and conditions of sale. purchasers are solely responsible for the choice, selection and use of the st products and services described herein, and st as sumes no liability whatsoever relating to the choice, selection or use of the st products and services described herein. no license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted under this document. i f any part of this document refers to any third party products or services it shall not be deemed a license grant by st for the use of such third party products or services, or any intellectual property contained therein or considered as a warranty covering the use in any manner whatsoev er of such third party products or services or any intellectual property contained therein. unless otherwise set forth in st?s terms and conditions of sale st disclaims any express or implied warranty with respect to the use and/or sale of st products including without limitation implied warranties of merchantability, fitness for a parti cular purpose (and their equivalents under the laws of any jurisdiction), or infringement of any patent, copyright or other intellectual property right. unless expressly approved in writing by an authorized st representative, st products are not recommended, authorized or warranted for use in milita ry, air craft, space, life saving, or life sustaining applications, nor in products or systems where failure or malfunction may result in personal injury, death, or severe property or environmental damage. st products which are not specified as "automotive grade" may only be used in automotive applications at user?s own risk. resale of st products with provisions different from the statements and/or technical features set forth in this document shall immediately void any warranty granted by st for the st product or service described herein and shall not create or extend in any manner whatsoev er, any liability of st. st and the st logo are trademarks or registered trademarks of st in various countries. information in this document supersedes and replaces all information previously supplied. the st logo is a registered trademark of stmicroelectronics. all other names are the property of their respective owners. ? 2009 stmicroelectronics - all rights reserved stmicroelectronics group of companies australia - belgium - brazil - canada - china - czech republic - finland - france - germany - hong kong - india - israel - ital y - japan - malaysia - malta - morocco - philippines - singapore - spain - sweden - switzerland - united kingdom - united states of america www.st.com

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